A block diagram for the implementation of a digital filter and square timing recovery for L=4 samples/symbol

Digital Filter and Square Timing Recovery

We have seen before how a symbol timing offset severely impacts the constellation of the received symbols. Therefore, symbol timing recovery is one of the most crucial jobs of a digital communications receiver. In the days of analog clock recovery, a timing error detector provided the instant to sample the Rx waveform at 1 sample/symbol at the maximum eye opening. However, discrete-time processing opened the doors for better timing recovery schemes as an ever increasing number of transistors within the same area consistently keeps bringing the digital processing cost down. Consequently, the use of analog circuits to control the timing

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A matched filter

Convoluted Correlation between Matched Filter and Correlator

Now we turn out attention towards a topic that causes a lot of confusion for communications and DSP learners: what is the difference between a matched filter and a correlator in a communications receiver? Let us start with the definition of a correlator: A correlator is a device that performs correlation of a received signal with its template within a given window of time. In our context, that window of time is the symbol duration, $T_M$. So a correlator performs the following operations. It takes this sample-by-sample product and sums them together. Next, it samples the output of this accumulation

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Illustration of peak ISI and asymmetry about -3dB point

Pulse Shaping Filter

In digital logic, a stream of 1s and 0s forms a sequence of rectangular pulses, which can be easily identified at the receiver side by a threshold. In time domain, everything looks nice and perfect. Let us investigate the system characteristics in frequency domain. In a Pulse Amplitude Modulation (PAM) system, the main component that defines the spectral contents of the signal is the pulse shape $p(nT_S)$ at the Tx. We start with our attention towards a simple rectangular pulse shape. Here is a brief outline of what we cover in this article. Table of Contents 1. Spectrum of a

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Spectral efficiency R_b/B versus E_b/N_0 determines the overall merit of a modulation scheme. This figure is drawn for BER = 10^{-5} and a Square-Root Raised Cosine pulse with 50% excess bandwidth

Computing Error Rates

Having built a simple digital communication system, it is necessary to know how to measure its performance. As the names say, Symbol Error Rate (SER) and Bit Error Rate (BER) are the probabilities of receiving a symbol and bit in error, respectively. SER and BER can be approximated through simulating a complete digital communication system involving a large number of bits and comparing the ratio of symbols or bits received in error to the total number of bits. Hence, \begin{equation}\label{eqCommSystemSER} \text{SER} = \frac{\text{No. of symbols in error}}{\text{Total no. of transmitted symbols}} \end{equation} and \begin{equation}\label{eqCommSystemBER} \text{BER} = \frac{\text{No. of bits in

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Minimum distance rule based detector decisions in a QPSK constellation in the presence of a carrier frequency offset

How a Frequency Locked Loop (FLL) Works

We saw before how a carrier frequency offset distorts the received signal. Later, we also described the classification of frequency synchronization techniques according to the availability of the symbol timing. Today, we will learn about the workings of a frequency locked loop. Background A Phase Locked Loop (PLL) is a device used to synchronize a periodic waveform with a reference periodic waveform. It is an automatic control system in which the phase of the output signal is locked to the phase of the input reference signal. In the article referred above, we also discussed that for a very small frequency

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