Block diagram of a 4 symbol communication system
Wireless/SDR

Packing More Bits in One Symbol

Note that digital electronics are constrained to work on only two levels by electronic switches which in the simplest case are either on or off. For many reasons, practical digital communication systems require quite complicated signal processing workload both at the Tx and Rx ends that can be performed only by a device more intelligent than an electronic switch, such as an Application Specific Integrated Circuit (ASIC), Field Programmable Gate Array (FPGA), Digital Signal Processor (DSP) or a General Purpose Processor (GPP). If this intelligent device can differentiate between two signal levels like a switch, it can certainly differentiate between

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Frequency domain beamforming implements a procedure for broadband signals that resembles the conventional narrowband beamformers
Wireless/SDR

Beamforming for Broadband Signals

Recall that classical or physical beamforming is based on calculating the differences in wave arrival times of a signal between antenna array elements and compensating for these delays through signal processing techniques that steer the beams in any desired direction. There are two main candidates for this purpose: Phase shifting and True Time Delays (TTD). We saw in that article on beamforming that phase shifts implemented through a set of complex multipliers are incapable of beamforming over the entire bandwidth of a signal. Why? The intuitive reason is clear from a signal level view. In the narrowband scenario, the same

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S-curve for decision-directed maximum likelihood phase error detector
Wireless/SDR

What are Cycle Slips and Hangup in Phase Locked Loops?

In a previous article, we have covered in detail the inner workings of a Phase Locked Loop (PLL) in a Software Defined Radio (SDR). There are two phenomena that have the potential to occasionally disrupt the performance of a PLL operating in steady state: cycle slips and hangup. Both the carrier and timing locked loops suffer from these issues. The underlying mathematics is quite intricate and hence I give a simple overview of these concepts. A reader interested in further exploration is referred to [1]. Cycle Slips To understand the cycle slip, assume that the loop is in tracking mode,

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DSP

Correlation

Correlation is a foundation over which the whole structure of digital communications is built. In fact, correlation is the heart of a digital communication system, not only for data detection but for parameter estimation of various kinds as well. Throughout, we will find recurring reminders of this fact. As a start, consider from the article on Discrete Fourier Transform that each DFT output $S[k]$ is just a sum of term-by-term products between an input signal and a cosine/sine wave, which is actually a computation of correlation. Later, we will learn that to detect the transmitted bits at the receiver, correlation

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An increasing degree of polynomial approximation takes the filter closer and closer to an ideal sinc impulse response
DSP / Wireless/SDR

Interpolation in Digital Communication Receivers

Timing synchronization in a digital receiver is about finding the right symbol peak and the symbol rate at which digital samples are taken for decisions purpose in a constellation diagram. In general, interpolation is the process of reproducing a missing sample at a desired location. In digital and wireless communications, the role of interpolation can be explained as follows. Background Imagine a Tx signal constructed from the upsampled and pulse shaped modulation symbols. The job of the Rx is to sample this waveform at optimal intervals, i.e., exactly at the middle of the eye diagram. In other words, the Rx

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