Tag: Clock Recovery

The counter, register and Tx and Rx start events
Localization

There and Back Again: Time of Flight Ranging between Two Wireless Nodes

With the growth in the Internet of Things (IoT) products, the number of applications requiring an estimate of range between two wireless nodes in indoor channels is growing very quickly as well. Therefore, localization is becoming a red hot market today and will remain so in the coming years. See the big picture of localization for general solutions to this problem. One question that is perplexing is that many companies now a days are offering cm level accurate solutions using RF signals. The conventional wireless nodes usually implement synchronization techniques which can provide around $\mu s$ level accuracy and if

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Phase jumps at every zero crossing from modulating data onto the carrier phase for a QPSK waveform
Wireless/SDR

The Fundamental Problem of Synchronization

We have seen in the effect of phase rotation that the matched filter outputs do not map back perfectly onto the expected constellation, even in the absence of noise and no other distortion. Unless this rotation is small enough, it causes the symbol-spaced optimal samples to cross the decision boundary and fall in the wrong decision zone. And even for small rotations, relatively less amount of noise can cause decision errors in this case, i.e., noise margin is reduced. In fact, for higher-order modulation, the rotation becomes even worse because the signals are closely spaced with each other for the

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A matched filter in continuous frequency domain along with the corresponding frequency matched filter for excess bandwidth 0.25
DSP / Wireless/SDR

Band Edge Filters for Carrier and Timing Synchronization

Band edge filters for carrier frequency and symbol timing synchronization is a very interesting topic that elegantly relates the tool (DSP) to the application (SDR design). This article is a short summary of where they originate from and what role they play for synchronization purpose. A Carrier Frequency Offset (CFO) arises due to a mismatch between Tx and Rx local oscillators as well as a phenomenon known as Doppler effect. In some other articles on this website, you will also find information on the Phase Locked Loop (PLL) in the context of carrier phase and timing synchronization. There is another

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Due to a Sampling Clock Offset (SCO), a fast Rx clock collects extra samples
Wireless/SDR

Effect of Sampling Clock Offset on a Single-Carrier Waveform

We have discussed before the distortion caused by a symbol timing offset on the communication waveform. We have also derived a maximum likelihood estimate of the clock phase offset. In this article, we describe the impact of a sampling clock offset in a single-carrier waveform, also commonly known as a clock frequency offset or timing drift. A clock frequency offset is defined as the rate mismatch between the Tx and Rx clocks. Just like a carrier phase and frequency offset, the clock used to sample the incoming continuous-time signal at a rate $T_S=1/F_S$ contains a phase and frequency offset as

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A Phase Locked Loop (PLL) for digital symbol timing recovery
Wireless/SDR

Phase Locked Loop (PLL) for Symbol Timing Recovery

A Phase Locked Loop (PLL) is a device used to synchronize a periodic waveform with a reference periodic waveform. It is an automatic control system in which the phase of the output signal is locked to the phase of the input reference signal. In the context of carrier phase synchronization, we talk about tracking the phase of an input reference sinusoid. For carrier frequency synchronization, a Frequency Locked Loop (FLL) is implemented. For the purpose of timing synchronization, the target is to adjust the timing phase of a receiver clock to that of the transmitter clock such that one sample/symbol

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